The present invention generally relates to semiconductor processing, and in particular to systems and methods for regulating the formation of a gate oxide layer in MOSFET semiconductor devices.
In the semiconductor industry, there is a continuing trend toward manufacturing integrated circuits with a greater number of layers and with higher device densities. To achieve these high densities there have been, and continue to be, efforts towards reducing the thickness of layers, improving the uniformity of layers, reducing the thickness of devices and scaling down device dimensions (e.g., at sub micron levels) on semiconductor wafers. In order to accomplish higher device packing densities, thinner layers, more uniform layers, smaller feature sizes, and smaller separations between features are required. This can include the thickness of gate oxide materials, (e.g, silicon oxide, silicon nitride, silicon oxynitride, metal oxides and high K materials such as ZrO2 and HfO2 and metal silicates of Hf, Zr, La, etc.), interconnecting lines, spacing and diameter of contact holes, and the surface geometry such as corners and edges of various features.
The process of manufacturing semiconductors, or integrated circuits (commonly called ICs, or chips), typically consists of more than a hundred steps, during which hundreds of copies of an integrated circuit can be formed on a single wafer. Generally, the process involves creating several layers on and in a substrate that ultimately forms the complete integrated circuit. This layering process can create electrically active regions in and on the semiconductor wafer surface. Insulation and conductivity between such electrically active regions can be important to reliable operation of such integrated circuits. Thus, controlling the width, thickness and/or uniformity of layers created during the layering process can be important to the reliable operation of such integrated circuits. Insulation and conductivity between electrically active regions is important in MOSFET (Metal Oxide Semiconductor Field Effect Transistor) semiconductor devices.
An exemplary MOSFET device 100 is illustrated in Prior Art. FIG. 1. The exemplary MOSFET device 100 illustrated includes a gate 104 separated from a substrate 110 by a gate oxide 102. The MOSFET includes a source 106 and a drain 108. The thickness of the gate oxide 102 can be important to reliable operation of the MOSFET 100, and thus, manufacturing the gate oxide 102 to precise measurements facilitates increasing MOSFET reliability.
The gate oxide layer 102 functions as an insulating layer. The gate oxide layer 102 can be the smallest feature of a device. Reducing the thickness of the gate oxide layer 102 can contribute to increasing the switching speed of a transistor. But reducing the thickness of the gate oxide layer 102 can lead to problems associated with breakdown and reliability of gate oxides. Thus, precisely monitoring and controlling properties of the gate oxide layer 102 including, but not limited to, thickness and uniformity, are important to facilitating reliable operation of the MOSFET 100. For example, the ability to store data, to retain data, to be erased, to be reprogrammed and to operate in desired electrical and temperature ranges can be affected by the thickness and/or uniformity of the gate oxide layer 102.
In stacked gate oxide films, the gate oxide is comprised of at least two layers but it is to be appreciated that it may be formed from two, three or more layers. The gate oxide is a very thin film, and thus precisely and uniformly forming sublayers having even smaller thickness than the gate oxide film is extremely difficult.
The requirement of small features with close spacing between adjacent features in MOSFET devices requires sophisticated manufacturing techniques including precise control of gate oxide layer formation. Furthermore, precise control of layers employed in fabricating stacked gate oxides similarly requires precise control. Fabricating a MOSFET device using such sophisticated techniques may involve a series of steps including the formation of layers/structures by chemical vapor deposition (CVD), rapid thermal oxidation, metalorganic CVD (MOCVD), atomic layer CVD (ALCVD), pulsed laser deposition (PLD), thermal oxide growth and other deposition processes. Difficulties in forming a gate oxide layer with precise thickness and/or uniformity have limited the effectiveness and/or properties of MOSFET devices manufactured by conventional techniques.
Due to the extremely fine structures that are fabricated on a MOSFET device, controlling the thickness of gate oxide layers employed to form a stacked gate oxide are significant factors in achieving desired critical dimensions and operating properties and thus in manufacturing a reliable MOSFET device. The more precisely the gate oxide can be formed, the more precisely critical dimensions may be achieved, with a corresponding increase in MOSFET device reliability. Conventionally, due to non-uniform and uncontrolled gate oxide layer formation and inaccurate gate oxide layer formation monitoring techniques, a thickness of gate oxide may be formed greater or lesser than the thickness desired.
This section presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is not intended to identify key/critical elements of the invention nor is it intended to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides for a system that facilitates monitoring and controlling gate oxide layer formation, in particular in monitoring and controlling the thickness and uniformity of a gate oxide layer employed in forming a stacked gate oxide. An exemplary system may employ one or more light sources arranged to project light on one or more gate oxide layers on a wafer and one or more light sensing devices (e.g., photo detector, photo diode) for detecting light reflected by the one or more gate oxide layers. The light reflected from the one or more gate oxide layers is indicative of at least gate oxide layer thickness, which may vary during the gate oxide layer formation process and/or gate oxide layer uniformity, which may similarly vary during the gate oxide layer formation process.
One or more gate oxide layer formers can be arranged to correspond to a particular wafer portion. Each gate oxide layer former may be responsible for forming a gate oxide layer on one or more particular wafer portions. The gate oxide layer formers are selectively driven by the system to form a gate oxide layer on one or more particular wafer portions at a desired thickness and/or desired uniformity. The progress of the gate oxide layer formation is monitored by the system by comparing the thickness and/or uniformity of the gate oxide layer on a wafer to a desired thickness and/or uniformity. Different wafers and even different components within a wafer may benefit from varying gate oxide thickness and/or uniformity. By monitoring gate oxide thickness and/or uniformity at one or more wafer portions, the present invention enables selective control of gate oxide formation. As a result, more optimal gate oxide formation is achieved, which in turn improves MOSFET device manufacturing. One aspect of the present invention is directed at gate oxides having a thickness less than about 2 nanometers. Another aspect of the present invention is directed at gate oxides having a thickness less than about 1 nanometers. Still another aspect of the present invention is directed at gate oxides having a thickness less than about 50 nanometers and another aspect of the present invention is directed at gate oxides having a thickness less than about 20 nanometers.
One particular aspect of the invention relates to a system for regulating gate oxide layer formation in MOSFET devices. The system includes one or more stacked gate oxide sublayer formers operative to form one or more stacked gate oxide sublayers on a portion of a wafer. The stacked gate oxide sublayers can be formed, for example, from silicon, oxygen and nitrogen combined to form materials including, but not limited to, silicon oxide, silicon nitride, and silicon oxynitride. The gate oxide layer can be of a thickness between 0.5 and 20 nanometers. The system also includes a stacked gate oxide sublayer former driving system for driving a stacked gate oxide sublayer former and a system for directing light on to a portion of the wafer. The system further includes a measuring system for measuring parameters of gate oxide formation thickness and/or uniformity based on light reflected from gate oxide formations and a processor that receives gate oxide formation thickness and/or uniformity data from the measuring system. The processor uses the data to generate feedback information that can be employed to base control of a gate oxide former so as to regulate gate oxide thickness and/or uniformity on the portion of the wafer.
Another aspect of the present invention provides a method for regulating gate oxide layer formation. The method includes defining a wafer as a plurality of portions and establishing one or more gate oxide layer formations to be formed in the one or more portions. The method further includes directing light onto the gate oxide layer formations, collecting light reflected from the gate oxide layer formations and analyzing the reflected light to determine thickness and/or uniformity of the gate oxide layer formation. Once the reflected light has been analyzed, the method proceeds to generating feedback information that can be employed in controlling gate oxide layer formers to regulate gate oxide formation.
To the accomplishment of the foregoing and related ends, the invention, then, comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative aspects of the invention. These aspects are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.